Integrated injection logic using oxide isolation

Details Integrated injection logic using oxide isolation Integrated injection logic using oxide isolation

1975-04-07

1976-08-31

Larkins, William D.

357 46, 357 50, 357 59, H01L 2704

Patent

active

039785157

ABSTRACT:
An integrated injection logic circuit cell structure and its fabrication are simplified. A pattern of oxide isolation regions is used to define, at least partially, the introduction of two types of impurities in such a way as to reduce the number of masking steps. Certain of these oxide regions do not penetrate through the conventional epitaxial layer, leaving a lateral buried path to serve as the base of a lateral injection transistor. A pattern of polycrystalline silicon containing impurities is used both as a diffusion source and an interconnection.

REFERENCES:
patent: 2663806 (1953-12-01), Darlington
patent: 3519901 (1970-07-01), Bean et al.
patent: 3534234 (1970-10-01), Clevenger
patent: 3664896 (1972-05-01), Duncan
patent: 3736477 (1973-05-01), Berger et al.
Evans et al., "Oxide-Isolated Monolithic Technology," IEEE Journal of Solid-State Circuits, Oct. 1973, pp. 373-379.
Cousand, "A Very High Speed, Low Power Bipolar . . . ," IEEE Int. Electron Dev. Meeting, Washington, D.C., Dec. 1973, Technical Digest pp. 35-37, paper 3-1.

Affiliated with

Also associated with

Rating

Integrated injection logic using oxide isolation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated injection logic using oxide isolation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated injection logic using oxide isolation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1819376