Process of conserving charge and a boosting circuit in a high ef

Details Process of conserving charge and a boosting circuit in a high ef Process of conserving charge and a boosting circuit in a high ef

1991-12-10

1993-06-01

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307482, 307264, 307578, 307491, H03K 1716, H03K 19096

Patent

active

052162907

ABSTRACT:
In one described embodiment of the present invention, an N-type metal oxide semiconductor (NMOS) output buffer boosts the voltage level on the gate of the pull-up device to improve output voltage level. In the prior art, the charge used to boost the output device is discharged to ground and the boot cap is recharged from the power supply. In this described embodiment, the circuit conserves most of the charge within the circuit by pulling the charge off of the output device back onto the boosting capacitor and isolating the boosted gate from the boosting capacitor. This technique does not slow the operation of the output buffer. There is no speed loss in doing this. The circuit uses about 1/2 to 1/3 the power of conventional output buffers.

REFERENCES:
patent: 3927334 (1975-12-01), Callahan
patent: 4077031 (1978-02-01), Kitagawa et al.
patent: 4110637 (1978-08-01), Rusznyak
patent: 4633106 (1986-12-01), Backes et al.
patent: 4916334 (1990-04-01), Minagawa et al.

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