Processing unit using truth-valued flow

Details Processing unit using truth-valued flow Processing unit using truth-valued flow

1989-12-04

1992-06-09

MacDonald, Allen R.

395900, 395 61, G07G 700, G05B 1101

Patent

active

051214660

ABSTRACT:
A truth value generator circuit array (11) includes truth value generator circuits (TG1-TG3) the number of which is the same as the number of kinds of input variables. Each truth value generator circuit generates truth values, which correspond to an applied input variable, with regard to a plurality of predetermined functions used by the antecedent of implications. The truth-valued-flow inference unit array includes truth-value-flow inference units (TVFI1-TVFI7) the number of which is the same as the number of predetermined functions used by the consequent of implications. Each truth-valued-flow inference unit corresponds to each function used by the consequent. All truth values outputted by the truth value generator circuit array enter each of the truth-valued-flow inference units. Each truth-valued-flow inference unit selects input truth values in accordance with predetermined rules and subjects these truth values to a prescribed operation. The truth value converter provides an output representing inferential results by applying, to the plurality of functions used by the consequents, the truth values outputted by the truth-valued-flow inference units in correspondence with these functions.

REFERENCES:
patent: 4837725 (1989-06-01), Yamakawa
patent: 4875184 (1989-10-01), Yamakawa
Yamakawa et al., "Fuzzy Memory Device", Preprints of Second IFSA Congress, Tokyo, Jul 20-25, 1987, pp. 551-555.
Yamakawa, "A Simple Fuzzy Computer Hardware System Employing Min & Max Operations", Preprints of Second IFSA Congress, Tokyo, Jul. 20-25, 1987, pp. 827-830.

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