Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1998-06-24

1999-09-07

Phan, Trong

Static information storage and retrieval

Addressing

Plural blocks or banks

365236, 365240, 36518901, G11C 800, G11C 1604

Patent

active

059497343

ABSTRACT:
A semiconductor memory device which has a plurality of main word lines, a plurality of sub-word lines connected to the main word lines, and memory blocks connected to the sub-word lines, and can read/write memory information in one memory block by supplying a block selection signal to one memory block includes an initial address memory means, a block count memory means, a read/write completion detecting means, a block selecting means, and a data transfer completion means. The initial address memory means stores the initial address of a read/write memory block. The block count memory means stores the number of read/write memory blocks. The read/write completion detecting means detects completion of a read/write for one memory block. The block selecting means outputs a block selection signal to activate one memory block on the basis of an initial address, and outputs a block selection signal to activate the next memory block on the basis of a read/write completion detection signal from the read/write completion detecting means. The data transfer completion means counts the number of read/write completion memory blocks on the basis of the read/write completion detection signal, and when the count value reaches the number of memory blocks in the block count memory means, completes a read/write.

REFERENCES:
patent: 4802125 (1989-01-01), Yamada
patent: 5233701 (1993-08-01), Nakata
patent: 5691949 (1997-11-01), Hively et al.

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