Boots – shoes – and leggings
Patent
1997-01-15
1997-12-23
Geckil, Mehmet B.
Boots, shoes, and leggings
39520019, 364DIG1, 364269, 364271, G06F 928, G06F 1342
Patent
active
057015090
ABSTRACT:
In each processing device of a parallel processor system, a processor outputs a signal when all the transmit data are transmitted to a router. A latch receives the signal from the processor to output a signal set to HIGH. To an AND gate are inputted the signal set to HIGH outputted from the latch and a signal set to HIGH which indicates that the router has no receive data received from a network. The parallel processor system performs AND operation on the outputs of the AND gates of all the processing devices, and detects that a data transmit/receive processing is completed among all the processing devices according to the results of AND operation.
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Geckil Mehmet B.
Matsushita Electric - Industrial Co., Ltd.
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