Multi-threaded processing system having a cache that is commonly

Details Multi-threaded processing system having a cache that is commonly Multi-threaded processing system having a cache that is commonly

1995-10-13

1997-12-23

Robertson, David L.

395420, G06F 1214

Patent

active

057014329

ABSTRACT:
A multi-threaded processing system has a cache that is commonly accessible to each thread. The cache has a plurality of entries for storing items, each entry being identified by an entry number. The location in the cache of an item that includes a first key is determined by supplying the first key to a lockless-lookup engine which then provides a lookup output that is alternatively a lookup entry number or an indication that the item is not stored in the cache. The lookup entry number is alternatively a first or second entry number, wherein the first entry number points to a first entry in which the item is stored and the second entry number points to a second entry in which the item is not stored. If the lookup output is the lookup entry number, then it is verified that the lookup entry number is the first entry number. This verification includes acquiring a mutual exclusion lock on the entry designated by the lookup entry number, using the lookup entry number to read a stored key from the cache, and comparing the first key with the stored key. If the two keys match, then the item has been located. Other aspects of the invention address the situations where the two keys do not match, or where the lookup output is the indication that the item is not stored in the cache.

REFERENCES:
patent: 5530834 (1996-06-01), Colloff et al.
patent: 5530958 (1996-06-01), Agarwal et al.
patent: 5535365 (1996-07-01), Barriuso et al.

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