Semiconductor trench capacitor cell with merged isolation and no

Details Semiconductor trench capacitor cell with merged isolation and no Semiconductor trench capacitor cell with merged isolation and no

1986-10-31

1989-01-31

James, Andrew J.

357 54, 357 47, 357 55, 357 50, 357 59, H01L 2978

Patent

active

048019887

ABSTRACT:
A semiconductor trench capacitor construction having a self-aligned isolation structure formed within the trench. The trench isolation structure consists of a thick isolating layer formed along the upper portion of the trench side walls. The trench isolation structure facilitates larger capacitor constructions and allows the capacitors to abut adjacent capacitors and other devices.

REFERENCES:
patent: 4238278 (1980-12-01), Antipov
patent: 4651184 (1987-03-01), Machi
patent: 4661832 (1987-04-01), Lechaton et al.
patent: 4688063 (1987-08-01), Lu et al.
patent: 4688069 (1987-08-01), Joy et al.
"Dynamic Ram Cell with Merged Drain and Storage", IBM Technical Disclosure Bulletin, vol. 27, Apr. 1985.
"CMOS Dynamic Random Access Memory Cell", IBM Technical Disclosure Bulletin, vol. 28, Nov. 1985.

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