Vertical double diffused metal oxide semiconductor VDMOS device

Details Vertical double diffused metal oxide semiconductor VDMOS device Vertical double diffused metal oxide semiconductor VDMOS device

1987-04-03

1989-01-31

James, Andrew J.

357 238, 357 13, 357 20, H01L 2978

Patent

active

048019860

ABSTRACT:
A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end.

REFERENCES:
patent: 4308549 (1981-12-01), Yeh
patent: 4561003 (1985-12-01), Tihanyi
patent: 4641162 (1987-02-01), Yilmaz
IEDM 1985 Nakagawa et al., "Experimental . . . MOSFET Characteristics", pp. 150-153, Wash., D.C., Dec. 1-4, 1985.

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