Semiconductor device

Details Semiconductor device Semiconductor device

1985-02-05

1987-05-12

Edlow, Martin H.

357 59, 357 67, 357 71, H01L 2972

Patent

active

046654240

ABSTRACT:
Disclosed herein is a semiconductor device applicable to a bipolar semiconductor integrated circuit device in which a base electrode (9) is directly extracted from an active base region (61) through a superposed layer of a polysilicon film (601) and a metal silicide film (501) while an emitter electrode (10) is partially formed by a polysilicon film (602) and a contact hole is defined to form a base metal silicide film with the polysilicon film being employed as a mask. Consequently, the distance between an emitter layer (71) and a base electrode hole (50) is reduced without necessity of including margins of emitter and base electrode wires extending over respective holes in the said distance.

REFERENCES:
patent: 3704398 (1972-11-01), Fukino
patent: 3762966 (1973-10-01), Engeler et al.
patent: 4252840 (1981-02-01), Minami
patent: 4329706 (1982-05-01), Crowder et al.
patent: 4476482 (1984-10-01), Scott et al.
Berndlmaier, E., Blumberg, R., Brenner, S., Dorler, J. A., "High-Performance Transistor", IBM Tech. Discl. Bull., vol. 19, No. 6, Nov. 1976.
Article: "Subnanosecond Self-Aligned 1.sup.2 L/MTL Circuits", D. D. Tang et al, IEEE Transactions on Electron Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1379-1384.

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