Method of manufacturing a semiconductor integrated circuit devic

Details Method of manufacturing a semiconductor integrated circuit devic Method of manufacturing a semiconductor integrated circuit devic

1980-09-12

1983-02-15

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29577C, 148187, H01L 2126

Patent

active

043732496

ABSTRACT:
A semiconductor integrated circuit device, especially an EPROM (Electrically Programmable Read Only Memory) device which consists of an MIS type memory transistor portion having a floating gate electrode and a control gate electrode on said floating gate electrode, and of an MIS type transistor portion having a gate electrode is formed by patterning the same conductor layer as the floating gate electrode in the periphery of said MIS type memory transistor portion.

REFERENCES:
patent: 4013489 (1977-03-01), Oldham
patent: 4075045 (1978-02-01), Rideout
patent: 4085498 (1978-04-01), Rideout
patent: 4123300 (1978-10-01), Joshi et al.
patent: 4142926 (1979-03-01), Morgan
patent: 4178674 (1979-12-01), Liu et al.
patent: 4180826 (1979-12-01), Shappir
patent: 4183040 (1980-01-01), Rideout
patent: 4326329 (1982-04-01), McElroy

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