Method and system of circuit pattern understanding and layout

Details Method and system of circuit pattern understanding and layout Method and system of circuit pattern understanding and layout

1985-07-26

1987-03-17

Gellner, Michael L.

Boots, shoes, and leggings

G06F 1560

Patent

active

046512845

ABSTRACT:
The structure of a circuit which is given basic net data is stored as a pattern, the compliance of the basic net data with the pattern is checked by the separately prepared search function, and upon fulfillment of compliance the pattern is determined to exist within the circuit. The subcircuit to be recognized by elements is not directly defined, but is defined using an intermediate expression defined recursively so as to implement a search through pattern matching. In another form, one input terminal is specified, which is followed by a search for blocks having the terminal as an input node and the search for blocks having one of the output node strings as an input node recursively and cyclically until the output terminal is reached, so as to extract a string of nodes on which the signal is propagated. The system is provided with functions for recognizing and comprehending subsidiary structures of the circuit which are not defined by the entered net data. By the combinational use of the recognition result and the layout shape generating function prepared separately, the layout shape of the subsidiary structures are determined. Shapes of objects determined through the above process are laid out automatically, while avoiding obstacles, within a predetermined space. According to still another form, layout patterns of variable structure memorizing the object layout and wiring affair are prepared in advance, and a layout plan for a circuit having a hierarchical structure is created through the operation of embedding the circuit to be laid out into a pattern.

REFERENCES:
patent: 4055802 (1977-10-01), Panousis et al.
patent: 4554625 (1985-11-01), Otten

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