Modular multiple error correcting code system

Details Modular multiple error correcting code system Modular multiple error correcting code system

1993-08-09

1996-07-16

Beausoliel, Jr., Robert W.

Excavating

371 381, 371 391, G06F 1110

Patent

active

055374271

ABSTRACT:
A method for encoding and decoding signals in accordance with a class of modular coding schemes is employed. Through a representation of Galois field elements in terms of a normal basis, wherein subsequent basis entries are squares of previous entries, it is possible to construct quasi-cyclic codes capable of double error correction and triple error detection. Modularity is achieved both at the time of check bit generation and also at the time of syndrome generation. Moreover, this achievement is carried out so as to be applicable in the domain of double error correction codes. The code avoids duplication of circuitry and is efficient in terms of delay through logic gate levels. The code also provides the capability of having byte parity check indications which are helpful for isolating failures.

REFERENCES:
patent: 4509172 (1985-04-01), Chen
patent: 4556977 (1985-12-01), Olderdissen et al.

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