CMOST input buffer for TTL level input signals

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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3072722, 307578, 307296R, 307475, 323315, H03K 458, H03K 3013, H03K 19017, H03K 1704

Patent

active

048018260

ABSTRACT:
A supply voltage originating from the charge present across a buffer capacitance connected in parallel with a logic gate including CMOS transistors is present across this gate. The loss of charge occurring when the capacitively loaded gate output is charged must be replenished. To this end there is provided a small direct current source feeding the buffer capacitance.

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patent: 4380710 (1983-04-01), Cohen et al.
patent: 4555644 (1985-11-01), Devecchi et al.
patent: 4677313 (1987-06-01), Mimoto
patent: 4680488 (1987-07-01), Okumura et al.
patent: 4692638 (1987-09-01), Stiegler
Fink et al, Electronics Engineers' Handbook, McGraw-Hill, pp. 16-15 to 16-19, 1982.

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