Over-erasure preventing device and method

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518529, 36518526, G11C 1604

Patent

active

060814578

ABSTRACT:
An over-erasure preventing device which applies, when erasing data written in a memory cell, an erasing voltage to an N-type source, and a potential difference reducing voltage to a control gate, so that the potential difference between the N-type source and control gate is reduced. This makes it possible to solve a problem involved in a conventional device in that once the memory cell has been destroyed by an over-erasure, the data read and write become impossible although the over-erasure can be remedied.

REFERENCES:
patent: 5475249 (1995-12-01), Watsuji et al.
patent: 5646885 (1997-07-01), Matsuo et al.
patent: 5657271 (1997-08-01), Mori
patent: 5742541 (1998-04-01), Tanigami et al.
patent: 5787037 (1998-07-01), Amanai

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