Method for producing integrated MOS field effect transistors wit

Details Method for producing integrated MOS field effect transistors wit Method for producing integrated MOS field effect transistors wit

1982-07-09

1984-07-31

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29577C, 29578, 29591, 148187, H01L 21283

Patent

active

044621493

ABSTRACT:
A method for producing integrated MOS field effect transistors, particularly complementary MOS field effect transistor circuits (CMOS-FET's) is provided wherein a metal silicide level, comprised preferably of tantalum silicide, is utilized as an additional interconnect (11). In this manner, all contact areas (9, 10, 13, 14, 15) to active (MOS) regions (6, 7) and polysilicon regions (5) for the metal silicide level (11) and also for the metal interconnect (12) are opened before the precipitation of the metal silicides. The structuring of the metal silicide level (11) is executed in such a manner that the p.sup.+ regions of the circuit remain protected during a flow-spread of an intermediate oxide (17) comprised of phosphorous glass.

REFERENCES:
patent: 4080719 (1978-03-01), Wilting
patent: 4102733 (1978-07-01), De La Moneda et al.
patent: 4273805 (1981-06-01), Dawson et al.

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