Method for interconnecting semiconductor devices

Details Method for interconnecting semiconductor devices Method for interconnecting semiconductor devices

1995-06-15

1996-07-16

Fourson, George

Fishing, trapping, and vermin destroying

437 41, 437193, 437186, H01L 2128

Patent

active

055366830

ABSTRACT:
A method for forming an interconnect structure within a semiconductor device. An isolation region which defines an active region is formed upon a semiconductor substrate. A gate electrode is formed upon the active region and an interconnect is formed partially upon the active region and partially upon the isolation region. A low dose ion implant is then provided into the active region not covered by the gate or the interconnect. A pair of insulator spacers are then formed at opposite edges of the gate. A source/drain electrode is then formed within the active region between the gate electrode and the interconnect, and a second source/drain electrode is formed within the active region between the isolation region and the gate. Finally, a metal silicide layer is formed bridging adjoining surfaces of the interconnect and the first source/drain electrode. In a second embodiment, the source/drain electrodes are formed after the metal silicide layer.

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patent: 5162259 (1992-11-01), Kolar et al.
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patent: 5326713 (1994-07-01), Lee
patent: 5346860 (1994-09-01), Wei
patent: 5444285 (1995-08-01), Robinson et al.

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