Excavating
Patent
1994-07-11
1995-10-31
Beausoliel, Jr., Robert W.
Excavating
371 53, G06F 1100
Patent
active
054636310
ABSTRACT:
A circuit structure for expanding the width of a plurality of error pulses detected in the data of one frame during digital transmission is described. A plurality of error pulses are counted by a counting circuit and the counted value is inputted to a pulse generating circuit. The pulse generating circuit outputs the frequency-divided clock pulses outputted from the frequency dividing circuit as many as the counted value. The frequency-divided clock pulse is obtained by dividing the frequency of the reference clock pulse of data with a predetermined rate and this frequency-divided clock pulse is outputted from the pulse generating circuit as the error pulse. The error pulse expanded in time only during such a frequency dividing period is very useful for improving the reliability of error rate detection.
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Beausoliel, Jr. Robert W.
Fujitsu Limited
Palys Joseph E.
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