Process for forming planar wiring using polysilicon to fill gaps

Fishing – trapping – and vermin destroying

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437192, 437200, 357 71, H01L 21283

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048015598

ABSTRACT:
A semiconductor device having a conductor line free of cracks is produced by forming an insulating layer on a semiconductor substrate, opening a contact hole in the insulating layer, forming a contact electrode comprising a high-melting point metal or a silicide of a high-melting point in the contact hole, filling a gap between the contact electrode and the side of the contact hole with polycrystalline silicon to form a substantially level surface, forming a conductor line on the level surface, and alloying the polycrystalline silicon with the conductor line and/or the contact electrode by heating.

REFERENCES:
patent: 3946476 (1976-03-01), Sanders
patent: 4017886 (1977-04-01), Tomono et al.
patent: 4109372 (1978-08-01), Geffken
patent: 4163246 (1979-07-01), Aomura et al.
patent: 4164461 (1979-08-01), Schilling
patent: 4271424 (1981-06-01), Inayoshi et al.
patent: 4291322 (1981-09-01), Clemens et al.
F. Barson, "Modified polysilicon emitter process," IBM Technical Disclosure Bulletin, vol. 22 (1980) pp. 4052-4053.
IBM Technical Disclosure Bulletin, "Dual Insulators for Planar Multilevel Interconnections", Gniewek et al., vol. 21, No. 3, Aug. 1978, pp. 1052-1053.

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