Error correcting code processing system

Details Error correcting code processing system Error correcting code processing system

1982-04-22

1984-09-25

Atkinson, Charles E.

Excavating

371 40, 371 43, 371 45, G06F 1108

Patent

active

044739028

ABSTRACT:
A high speed code processing system for error correcting code is disclosed. It uses bit parallel residue generation for cyclic codes. This minimizes the time delay for cyclic code processing. Residue generation of the bit string is accomplished by processing multiple bits in each clock time instead of the conventional bit-by-bit implementation. Thus, the checkword calculation and the syndrome calculation are accomplished at a significantly higher speed than the conventional shift register approach to provide a system capable of on-line residue generation.

REFERENCES:
patent: 3678469 (1972-07-01), Freeman et al.
patent: 4168486 (1979-09-01), Legory
patent: 4242752 (1980-12-01), Herkert
patent: 4354269 (1982-10-01), Vries et al.
patent: 4395768 (1983-07-01), Goethals et al.
Parallel-Serial Implementation of Error Correcting Code System, Chen et al., IBM Technical Disclosure, Nov. 1979.
Semi-Parallel Generation of CRC Character, Clough et al., IBM Technical Disclosure, Feb. 1977.
Parallel CRC Generation for Multilength Characters, Boudreau et al., IBM Technical Disclosure, Sep. 1972.
Displacement Calculation of Error Correcting Syndrom Bytes by Table Lookup, Cummins, IBM Technical Disclosure, Jan. 1980.

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