Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1987-07-22

1989-07-18

Popek, Joseph A.

Excavating

365203, 365200, 36523008, G11C 700

Patent

active

048499382

ABSTRACT:
In a semiconductor memory device of a redundancy configuration having lines (rows or columns) of main memory cells and a line of spare memory cells made to substitute a defective line responsive to the address of the defective line, a comparator compares an address input to the memory device, with the address of the defective line which has been programmed in it, and a spare line selector selects the spare line when the input address is found to coincide with the programmed address. A line decoder is responsive to the input address for selecting one of the lines of the normal memory cells, and is inactivated by the output of the comparator when the input address is found to coincide with the programmed address. An input address to the line decoder is applied before the same input address is applied to the comparator.

REFERENCES:
patent: 4723227 (1988-02-01), Murotani
Electronics/Jul. 28, 1981, pp. 127-130; "Equipping a Line of Memories with Spare Cells", Abbott et al.

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