Static information storage and retrieval – Floating gate
Patent
1993-12-10
1997-01-07
Nelms, David C.
Static information storage and retrieval
Floating gate
36518528, 36518529, G11C 1300
Patent
active
055924158
ABSTRACT:
Each memory cell of a non-volatile semiconductor memory essentially consisting of a one-transistor type memory cell comprising only of an MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Particularly because the negative voltage is used for the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
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Adachi Tetsuo
Kato Masataka
Kimura Katsutaka
Kume Hitoshi
Sasaki Toshio
Hitachi , Ltd.
Le Vu A.
Nelms David C.
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