Boots – shoes – and leggings
Patent
1994-09-16
1997-01-07
Gordon, Paul P.
Boots, shoes, and leggings
371 371, G06F 700, G06F 1500, H03M 1300
Patent
active
055924042
ABSTRACT:
An error correction system operates in two modes: (1) a two-phased mode for correcting computer data having pointers; and (2) a subcode mode for correcting subcode packs included with audio digital data. During a first (two-phased) mode for correcting computer data with pointers, a generator (20), calculator (30), and corrector (60) are each operated during two phases. During a first phase (PTR.sub.-- TIME) the generator (20) generates one or two multi-bit buffer-obtained pointers (.alpha..sup.L0 =P.sub.0, .alpha..sup.L1 =P.sub.1) for the most-recent codeword while the calculator (30) uses syndromes (S.sub.0, S.sub.1) generated by generator (20) for a previous codeword CW.sub.n-1 to generate one or two error patterns (E.sub.0, E.sub.1) for the previous codeword. During a second phase (DATA.sub.-- TIME), the generator (20) generates syndromes (S.sub.0, S.sub.1) for the most-recent codeword CW.sub.n while the calculator (30) performs mathematical operation(s) with respect to any multi-bit buffer-obtained pointers (i.e.,P.sub.0, P.sub.1) for the most-recent codeword CW.sub.n. In a second mode for correcting subcodes, the system first generates differing sets of subcode syndromes with respect to differing portions of the pack. After generation of the subcode syndromes, the system controller (10) analyzes the subcode syndromes and applies differing correction strategies in accordance with the analysis.
REFERENCES:
patent: Re28923 (1976-08-01), Patel
patent: 4077028 (1988-02-01), Lui et al.
patent: 4787085 (1988-11-01), Suto et al.
patent: 5010554 (1991-04-01), Bechtel et al.
patent: 5084878 (1992-01-01), Kanekawa et al.
patent: 5185711 (1993-02-01), Hattori
patent: 5218691 (1993-06-01), Tuma et al.
patent: 5291584 (1994-03-01), Challa et al.
patent: 5297148 (1994-03-01), Harari et al.
patent: 5404361 (1995-04-01), Casorso et al.
patent: 5440570 (1995-08-01), Wei et al.
Patent Abstracts Of Japan, vol. 18, No. 564 (P-1819) 27 Oct. 1994 & JP,A,06 203487 (Fujtsu) 22 Jul. 1994, see abstract.
Patent Abstracts Of Japan, vol. 18, No. 370 (P-1768), 12 Jul. 1994 & JP,A,06 096531 (Pioneer) 8 Apr. 1994, see abstract.
Patent Abstracts Of Japan, vol. 16, No. 571 (P-1459) [5614], 11 Dec. 1992 & JP,A,04 222029 (Sony) 12 Aug. 1992, see abstract.
Cirrus Logic Inc.
Gordon Paul P.
Moise Emmanuel L.
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