Patent
1997-03-19
1999-05-18
Sheikh, Ayaz R.
39518307, 39518315, 39518318, 395575, G06F11/00
Patent
active
059058579
ABSTRACT:
In order to gather, store temporarily and efficiently deliver (if needed) safestore information in a fault tolerant central processing unit having data manipulation circuitry including a plurality of software visible registers, a safestore memory for storing the contents of the plurality of software visible registers, after a data manipulation operation, is provided. Iterative execution instructions subject to a page fault are specially handled in that, during execution, status information indicative of the ongoing status and valid intermediate results are additionally stored in the safestore memory. Then, in the event of a page fault encountered during the execution of the iterative execution instruction, execution is suspended until access to a valid copy of the missing page is obtained. When a valid copy becomes available, the execution of the iterative execution instruction is restarted at the point at which the valid intermediate results had been obtained prior to occurrence of the page fault.
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Buzby Wayne R.
Wilhite John E.
Yoder Ronald W.
Bull HN Information Systems Inc.
Phan Raymond N.
Phillips James H.
Sheikh Ayaz R.
Solakian John S.
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