Vector processing system for processing plural vector instructio

Details Vector processing system for processing plural vector instructio Vector processing system for processing plural vector instructio

1987-08-20

1989-07-18

Zache, Raulfe B.

Boots, shoes, and leggings

364736, 3642283, 36423221, 3642448, 3642289, G06F 15347, G06F 1516

Patent

active

048498823

ABSTRACT:
A vector processor has a plurality of vector processing units each of which is connected to main storage via a plurality of memory port logic units. Each of the vector processing units has a resource management circuit, thereby managing its resources and the plurality of memory port logic units as resources and reporting information of the memory port logic unit determined to be used to other vector processing units. The plurality of memory port logic units are thus shared by the plurality of vector processing units.

REFERENCES:
patent: 4172287 (1979-10-01), Kawabe et al.
patent: 4620275 (1986-10-01), Wallach et al.
patent: 4633389 (1986-12-01), Tanaka et al.
patent: 4641275 (1987-02-01), Hatakeyama et al.
patent: 4685076 (1987-08-01), Yoshida
patent: 4757444 (1988-07-01), Aoyama et al.
T. Cheung, J. E. Smith, A Simulation Study of the CRAY X-MP Memory System, Jul. 1986, IEEE Computer, vol. C-35, pp. 613-622.

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