Digital processing system for binary addition/subtraction

Details Digital processing system for binary addition/subtraction Digital processing system for binary addition/subtraction

1997-09-11

1999-05-18

Mai, Tan V.

Boots, shoes, and leggings

G06F7/38

Patent

active

059056622

ABSTRACT:
A digital processing system for binary addition/subtraction includes an adder for adding two binary data respectively expressed by two's complements to output the addition result, an overflow carry detector for outputting an overflow carry signal indicating an overflow carry of the addition result, an exclusive OR gate for outputting the sign bit of the addition result of the adder with or without inversion, and a register for storing the output from the exclusive OR gate.

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patent: 4796218 (1989-01-01), Tamaka et al.
patent: 5260890 (1993-11-01), Suzuki
patent: 5369438 (1994-11-01), Kim
patent: 5774829 (1998-06-01), Cisneros et al.

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