Apparatus for scrambling/descrambling data by word-by-word proce

Cryptography – Electric signal modification – Having production of printed copy

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380 49, H04L 900

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active

050540696

ABSTRACT:
A scrambling/descrambling apparatus has a data memory for storing a data word, a bit invert flag, and numerical data. A bit shift operating section performs, on receiving a bit of data to be outputted or a bit of input data, a bit shift operation with that bit and stores resultant data in the data memory in the form of a first data word. A randomizing/derandomizing section randomizes or derandomizes the input data by using the first data word and based on a generating polynomial and, depending on a state represented by the bit invert flag, inverts the bit of the data to be outputted to develop output data. A count processing section increments or decrements the numerical value stored in the data memory and, depending on the numerical value, selectively sets the bit invert flag to a predetermined state. A count controlling section replaces the numerical value with a predetermined initial value on the basis of the first data word and bit invert flag. The data memory holds a second and a third data word, bits of which corresponding in position to a particular bit of the first data word are a ZERO and a ONE, respectively. The count controlling section reads selectively either one of the second and third data words out of the data memory depending on the value of the bit which is inputted to the bit shift operating section, Exclusive-ORs the data word read out and the first data word, performs a masking operation with a data word resulting from the Exclusive-ORing for validating a bit corresponding in position to the particular bit position of the first data word while invalidating the remaining bits, and replaces the numerical value with the initial value when a data word resulting from the masking operation is indicative of a ZERO or when the bit invert flag is in the predetermined state. Alternatively, the count controlling section may read the first data word out of the data memory and, depending on the value of the bit which is inputted to the bit shift operating section, NOT or transfer the first data word, performs a masking operation with a data word representative of a result of NOTing or that of transfer for validating a bit corresponding in position to the particular bit position of the first data word while invalidating the remaining bits, and replace the numerical value with the initial value when a data word resulting from the masking operation is indicative of a ZERO or when the bit invert flag is in the predetermined state.

REFERENCES:
patent: 4771462 (1988-09-01), Hannan et al.
patent: 4907271 (1990-03-01), Gilham
patent: 5911216 (1975-10-01), Bartek et al.
"Data Communication Over The Telephone Network" CCITT, V8 Recommendations of the V series VIIIth Plenary Session 8-19 Oct. 1984 pp. 170-198.

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