Method and apparatus for logic simulation

Details Method and apparatus for logic simulation Method and apparatus for logic simulation

1989-03-06

1991-10-01

Lall, Parshotam S.

Boots, shoes, and leggings

364488, G06F 1560

Patent

active

050539809

ABSTRACT:
Determination of an operation of a logic circuit is usually called logic simulation. The logic simulation in which changes in signal status at input terminals and output terminals of an element in the logic circuit to be simulated are represented by events and the signal status at the output terminal is calculated only for the element in which the event has occurred at the input terminal thereof, is called an event driven logic simulation. In the event driven logic simulation, a current time is used to decide and extract the event to be processed. In the prior art apparatus, the decision and extraction are interrupted when the current time is updated. In the present invention, identifiers (colors) are imparted to the events to group the events. The current time is updated when the event having a special color is not present. Thus, a simulation speed in the event driven logic simulation method and apparatus is improved.

REFERENCES:
patent: 4675832 (1987-06-01), Robinson et al.
patent: 4787061 (1988-11-01), Nei et al.
patent: 4860291 (1989-08-01), Damm et al.
IEEE International Conference on Computer-Aided Design (ICCAD-87) 9-12 Nov. 1987, pp. 488-491, Santa Clara, CA, US; C. M. Dyson et al.: "A Pipelined Event-Driven Mixed-Mode Simulator".
IEEE Design and Test of Computers vol. 2, No. 5, Oct. 1985, pp. 61-73, NY, US; N. Koike et al.: "HAL: A High-Speed Logic Simulation Machine".

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