Bit-sliced cross-connect chip having a tree topology of arbitrat

Details Bit-sliced cross-connect chip having a tree topology of arbitrat Bit-sliced cross-connect chip having a tree topology of arbitrat

1988-11-01

1991-10-01

Lee, Thomas C.

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3642283, 364229, 3642294, 36422941, 3642381, 3642384, 3642407, 3642426, 3642427, 3642429, 36424291, 364243, 364246, 364252, G06F 1300, G06F 1318, G06F 13364, G06F 1200

Patent

active

050539426

ABSTRACT:
A cross-connect circuit for coupling each of a plurality of processors to a memory module selected from a plurality of such modules, provided the module in question has not been identified for connection to another of the processors is disclosed. The circuit is preferably organized as a bit-sliced chip. The connections made by the cross-connect circuit can be changed after each memory cycle.

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patent: 4374413 (1983-02-01), Comfort et al.
patent: 4374414 (1983-02-01), Comfort et al.
patent: 4834483 (1989-05-01), Arthurs et al.
patent: 4920484 (1990-04-01), Ranade
M. Valencia et al. "Asynchronous Modular Arbiter", IEEE Transactions on Computers, vol. C-35, No. 1 (Jan. '86); pp. 67-70.

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