Radiation hardened integrated circuit and method of making the s

Details Radiation hardened integrated circuit and method of making the s Radiation hardened integrated circuit and method of making the s

1987-11-20

1989-07-18

Carroll, J.

357 231, 357 41, 357 4, 357 51, 357 54, 357 59, H01L 2978, H01L 2702, H01L 2712, H01L 2934

Patent

active

048498050

ABSTRACT:
A SOI integrated circuit includes a plurality of islands of single crystalline silicon on a surface of a substrate of an insulating material. Each of the silicon islands contains an electrical component, such as a MOS transistor. A layer of silicon oxide is on the surface of the substrate between the islands and is slightly spaced, at least about 0.1 micrometers, from each of the silicon islands. A line of a conductive material, such as conductive polycrystalline silicon, extends over the silicon islands and between the silicon islands over the silicon oxide layer. The silicon oxide layer isolates the conductive line from the substrate so that any photocurrent generated in the substrate as a result of the integrated circuit being exposed to radiation will not flow through the conductive line to disrupt the circuit.

REFERENCES:
patent: 4199723 (1980-04-01), Goodman et al.
patent: 4242156 (1980-12-01), Peel
patent: 4368085 (1983-01-01), Peel
patent: 4609930 (1986-09-01), Yamazaki

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