Sense amplifier circuit

Details Sense amplifier circuit Sense amplifier circuit

1981-12-22

1984-03-27

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

365203, 365104, 365204, 307469, H03K 5153, H03K 524, G11C 706

Patent

active

044396970

ABSTRACT:
A sense amplifier circuit is disclosed in which a ROM is grouped into a plurality of ROM arrays and outputs from sense amplifiers provided for each ROM array are supplied to a single output terminal. In the sense amplifier circuit, each sense amplifier has a P-MOS FET connected between the output of the ROM array and a ground terminal and connected at the gate to a preset terminal, P-MOS FETs connected between the output of the ROM array and a positive power source and whose gates are respectively connected to the output terminal and a preset terminal, and an N MOS FET connected between the output terminal and the ground terminal and at the gate to the output terminal of the ROM array. Further, a P MOS FET is connected between the output terminal and the power source terminal and at the gate to an inverted preset terminal.

REFERENCES:
patent: 4048626 (1977-09-01), Fett
Cordaro, "Read-Only Storage Bit Precharge/Sense Circuit", IBM Tech. Discl. Bull., vol. 17, No. 4, p. 1044, Sep. 1974.

Affiliated with

Also associated with

Rating

Sense amplifier circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Sense amplifier circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sense amplifier circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1757688