Patent
1991-05-02
1992-06-16
Mintel, William
357 32, 357 22, 357 51, H01L 2714
Patent
active
051228513
ABSTRACT:
A method and construction are disclosed to form a trench gate JFET transistor. The invention comprises forming a first trench in a semiconductor substrate, forming a gate channel about the trench and forming a conductive layer upon the surface of the gate channel. The conductive layer interfaces with the gate channel to form a p-n junction. Source and drain regions are formed adjacent to a trench and disposed in electrical contact with the gate channel. An integral capacitor may be added to the construction by forming a second trench, which extends through and excavates a portion of the first trench. The drain region is extended about the surface of the second trench to remain in electrical contact with the gate channel. A layer of insulating material is applied to the second trench, which is then filled with a body of conductive material. The conductive material is insulated from the conductive layer by the insulating layer.
REFERENCES:
patent: 4633086 (1986-12-01), Parrish
patent: 4684968 (1987-08-01), Ohta et al.
Grumman Aerospace Corporation
Mintel William
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