Source-coupled FET-logic-type logic circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307475, H03K 1920, H03K 190175

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active

051226820

ABSTRACT:
A source-coupled FET-logic-type logic circuit having level shift elements connected to a high-potential power supply, field-effect transistors, load elements connecting the sources of the field-effect transistors, field-effect transistors coupled between the high-pontential power supply and a low-potential power supply, constant current sources, and complementary output terminals. The circuit further has a field-effect transistors controlled by complementary signals input to two input terminals. The circuit, which is a T flip-flop, further comprises a frequency switching circuit composed of field-effect transistors which are controlled by the signals supplied to two switching terminals. When the first switching terminal is at a high level, the output terminals outputs a signal having the same frequency as the input signal. When the first switching terminal is at a low level, the output terminals outputs a signal having half the frequency of the input signal.

REFERENCES:
patent: 4806796 (1989-02-01), Bushey et al.
patent: 4968904 (1990-11-01), Yamashita et al.
IBM Technical Disclosure Bulletin, vol. 32, No. 5B, Oct. 1989; "Enabled Flip-Flop for Frequency Division".
M. J. Delaney et al., 8179 IEEE Electron Device Letters, Aug. 10, 1989, No. 8, New York, "Low-Temperature Buffer GaAs MESFET Technology for High-Speed Integrated Circuit Applications", pp. 355-357.

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