Method of manufacturing a semiconductor device and device manufa

Details Method of manufacturing a semiconductor device and device manufa Method of manufacturing a semiconductor device and device manufa

1978-04-07

1979-04-03

Ozaki, G. T.

Metal treatment

Stock

Ferrous

148 15, 148175, 148187, 148188, 29571, 29579, H01L 21225, H01L 2126, HO1L 2704

Patent

active

041480546

ABSTRACT:
A method of manufacturing a semiconductor device, in particular a monolithic integrated circuit having very small complementary transistors. According to the invention two surface zones are provided beside each other without a masking tolerance of which one is formed by diffusion from a thin silicon layer. The distance between the surface zones is determined by the width of an oxide strip formed on the surface and on the edge of the silicon layer. The oxide strip is obtained by an underetching process and by using a silicon nitride mask deposited with shadow effect.

REFERENCES:
patent: 3753807 (1973-08-01), Hoare et al.
patent: 3904450 (1975-09-01), Evans et al.
patent: 3913211 (1975-10-01), Seeds et al.
patent: 3962717 (1976-06-01), O'Brien
patent: 4066473 (1978-01-01), O'Brien
patent: 4084987 (1978-04-01), Godber

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