1983-12-02
1986-12-23
Edlow, Martin H.
357 42, 357 46, 357 2314, H01L 2978, H01L 2702
Patent
active
046315659
ABSTRACT:
A power FET is preceded by an input amplifier consisting of a second FET of the same channel type and a third FET of an opposite channel type. The FETs of the pre-amplifier can be integrated into the chip of the power FET without additional production steps if the power FET and the second FET are designed as vertical FETs and the third FET as a lateral FET. Through this semiconductor device, the relatively high input capacitance of power MISFETs, which results in slow switching speeds when driven by standard ICs, is overcome.
REFERENCES:
patent: 4190850 (1980-02-01), Tihanyi et al.
patent: 4345265 (1982-08-01), Blanchard
patent: 4402003 (1983-08-01), Blanchard
patent: 4455565 (1984-06-01), Goodman et al.
patent: 4541001 (1985-09-01), Schutten
patent: 4547791 (1985-10-01), Roger et al.
Edlow Martin H.
Henn Terri M.
Moran John Francis
Siemens Aktiengesellschaft
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