Method of producing a semiconductor integrated circuit BI-MOS de

Details Method of producing a semiconductor integrated circuit BI-MOS de Method of producing a semiconductor integrated circuit BI-MOS de

1987-01-12

1988-09-20

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437 41, 437 59, 357 43, H01L 21283, H01L 2120

Patent

active

047725672

ABSTRACT:
A method of producing a semiconductor integrated circuit device in which a bipolar element and a MOS element are produced on a same chip, which includes forming an oxide film on the epitaxial regions of the device; depositing a silicon film on the device over epitaxial regions and forming a base electrode leading region using said silicon; and forming a base leading layer by diffusion from said base electrode leading region to reduce the distance between a collector leading region and the base electrode leading region, thereby enhancing the characteristics of the bipolar element.

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patent: 4545116 (1985-10-01), Lau
Ghandhi, "VLSI Fabrication Principles", 1983, John Wiley & Sons, pp. 435-437.

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