Memory-programmable control

Details Memory-programmable control Memory-programmable control

1983-09-13

1986-07-15

Thomas, James D.

Boots, shoes, and leggings

364131, G06F 1322, G05B 1918

Patent

active

046009884

ABSTRACT:
A multiprocessor system having a memory-programmable control of the type having a processor unit, coupling memories and input and output modules for transferring signals to and from a process which is to be controlled. Each processor unit is provided with a subprogram and a data memory which can be accessed directly, and a bus control unit releases access to the common system bus always for only one of the processor units. The access sequence and the access duration of the individual processor units to the common bus, via which the signals run to and from the controlled process, are fixed in a bus assignment matrix. In this manner, simple synchronization of the processor units is achieved. Moreover, guaranteed reaction times with respect to the process are possible. In addition to the duration, sequence, and frequency of the bus access of each processor unit in a bus cycle, the latest number bus window which must be seized by each processor unit can also be monitored by a bus monitoring device, thus insuring that guaranteed reaction times are possible.

REFERENCES:
patent: 3363234 (1968-01-01), Erickson
patent: 3801962 (1974-04-01), Moore
patent: 3921146 (1975-11-01), Danco
patent: 3942158 (1976-03-01), Dummermuth
patent: 4141066 (1979-02-01), Keiles
patent: 4209840 (1980-06-01), Berardi
patent: 4266281 (1981-05-01), Struger
patent: 4467436 (1984-08-01), Chance
Horst Huse, "Multi-Mikrocomputer System", Elektronik, 1-29-82, pp. 76-84.
Hermann Schmid, "Multi-Mikroprozessor System", Elektronik, 1-29-82, pp. 87-95.

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