Patent
1979-06-19
1986-07-15
Clawson, Jr., Joseph E.
357 41, 357 42, 357 59, 357 91, H01L 2978
Patent
active
046009337
ABSTRACT:
An integrated circuit structure includes a substrate, diffused regions formed in the upper surface of the substrate, and thin and thick insulative regions, polycrystalline regions, and metallic interconnections selectively formed overlying selected areas of the substrate surface. An insulating passivation layer overlying the integrated circuit provides mechanical protection for the integrated circuit. Openings are selectively formed in the passivation layer overlying a portion of the integrated circuit at a position other than that of a bonding pad, and above one of the polycrystalline regions positioned over one of the thin insulating regions. The openings may be used to perform ion implantation to modify theelectrical characteristics, such as the threshold voltage, of the integrated circuit at those locations. The disturbance produced in the lattice structure of the silicon substrate during selective ion implantation may, in one aspect of the invention, not be annealed out in subsequent processing steps such that the remaining lattice disturbance further modifies the threshold voltage at the selected implanted locations.
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Clawson Jr. Joseph E.
Standard Microsystems Corporation
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