Output circuit with buffer

Details Output circuit with buffer Output circuit with buffer

1992-10-14

1994-02-22

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307603, H03K 1704

Patent

active

052890635

ABSTRACT:
An output circuit having a buffer, the buffer including the first transistor which receives at a gate thereof a periodic input voltage and the second transistor, the first and the second transistors being connected in series across a power line and a ground line, a junction of the first and second transistors being connected to an output terminal. The output circuit includes a circuit for applying, to a gate of the second transistor, a first voltage for the second transistor to serve as a bias transistor for charging a load connected to the output terminal with a voltage corresponding to the input voltage, and the second voltage greater than the first voltage for the second transistor to serve as a discharge transistor for discharging the load.

REFERENCES:
patent: 3393325 (1965-07-01), Borror et al.
patent: 3395291 (1965-09-01), Bogert
patent: 4631425 (1986-12-01), Koshimaru
patent: 4642491 (1987-02-01), Kenney et al.
patent: 4950925 (1990-08-01), Doi et al.
patent: 5003205 (1991-03-01), Kohda et al.
Dictionary of Electronics 2nd Ed. Penguin Books Copyright 1988 p. 365,6 FIG. C "Ratioless Circuit".

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