Methods for implementing logic in auxiliary components associate

Details Methods for implementing logic in auxiliary components associate Methods for implementing logic in auxiliary components associate

1995-09-26

1998-06-16

Teska, Kevin J.

Boots, shoes, and leggings

364490, 707 7, 707 8, G06F 1700

Patent

active

057685622

ABSTRACT:
Methods for implementing a portion of a user's logic design in a component such as a random access memory, a read-only memory, an arithmetic logic unit, a digital signal processor, a microprocessor, or the like which is associated with programmable logic array integrated circuitry are disclosed. A candidate portion of the user's logic is identified and its logic requirements are determined and compared to the logic capabilities of the auxiliary component. If the candidate logic portion can be implemented in the auxiliary component, that may then be done. Alternatively, additional analysis may be performed prior to implementation (e.g., to make sure that it is beneficial to implement this logic portion in the auxiliary component and/or to ascertain whether it would be more beneficial to implement some other portion of the logic in the auxiliary component). The balance of the user's logic design, which is not implemented in the auxiliary component, is implemented in the basic programmable logic array integrated circuitry.

REFERENCES:
patent: 4812975 (1989-03-01), Adachi
patent: 4975601 (1990-12-01), Steele
patent: 5099150 (1992-03-01), Steele
patent: 5128559 (1992-07-01), Steele
patent: 5128871 (1992-07-01), Schmitz
patent: 5247634 (1993-09-01), Cline et al.
patent: 5282163 (1994-01-01), Shibata
patent: 5291614 (1994-03-01), Baker et al.
patent: 5414839 (1995-05-01), Joshi
patent: 5426744 (1995-06-01), Sawase et al.
patent: 5465319 (1995-11-01), Ahamed
patent: 5487164 (1996-01-01), Kirchhofer
patent: 5550782 (1996-08-01), Cliff et al.
patent: 5586219 (1996-12-01), Yufik
John L. Nichols, "A Logical Next Step for Read-Only Memories", Electronics, Jun. 12, 1967, pp. 111-113.
Floyd Kvamme, "Standard Read-only Memories Simplify Complex Logic Design", Elecronics, Jan. 5, 1970, pp. 88-95. Easily", Electronics, May 11, 1970, pp. 104-111.
William I. Fletcher et al., "Simplify Sequential Circuit Designs", Electronic Design, Jul. 8, 1971, pp. 70-72.
Howard A. Sholl et al., "Design of Asynchronous Sequential Networks Using Read-Only Memories", IEEE Transactions on Computers, vol. C-24, No. 2, Feb. 1975, pp. 195-206.
Arnold Weinberger, "High-Speed Programmable Logic Array Adders", IBM J. Res. Develop., vol. 23, No. 2, Mar. 1979, pp. 163-178.
Yahiko Kambayashi, "Logic Design of Programmable Logic Arrays", IEEE Transactions on Computers, vol. C-28, No. 9, Sep. 1979, pp. 609-617.
MAX+PLUS II Programmable Logic Development System; Getting Started, Version 5.0, Altera Corporation, San Jose, CA, Jul. 1994.
MAX+PLUS II Programmable Logic Development System; AHDL, Version 5.0, Altera Corporation, San Jose, CA, Jul. 1994.

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