Programmable logic device with limited sense currents and noise

Details Programmable logic device with limited sense currents and noise Programmable logic device with limited sense currents and noise

1985-03-04

1989-05-23

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

36518908, 365208, 307468, 34082583, 34082587, 34082541, G11C 1140, G11C 700, G06F 738, H04Q 0000

Patent

active

048336467

ABSTRACT:
A programmable logic device is disclosed which is adapted to isolate the Miller capacitances of erased memory cells from the product terms and to limit the cell current drawn through the product term sense amplifiers. The invention substantially reduces the row switching noise coupled onto the product terms, allows high speed sense amplifier operation, and significantly reduces the power dissipated by the device. In accordance with the invention, the electrically erasable sense transistor for each memory cell is disposed between the cell select transistor and the product term sense amplifier, thereby isolating the Miller capacitance associated with the select transistor from the sense amplifier when the cell is in the erased (nonconductive) state. Separate product term ground lines are provided for each product term. A current limiter connects each product term ground line to ground, and is adapted to limit the current flow through each product term to a predetermined maximum level, typically about the maximum current level which may be passed through one conductive memory cell.

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