Solid state image sensor with lag control electrode

Details Solid state image sensor with lag control electrode Solid state image sensor with lag control electrode

1981-04-07

1983-09-13

Helms, David C.

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

357 24, H01J 4014

Patent

active

044044666

ABSTRACT:
A lag control electrode is mounted on that portion of a cell constituting a picture element which is disposed on one end portion of an N.sup.+ layer. A gate electrode is provided close to the other end portion of the N.sup.+ layer. Where a picture light enters a solid state image sensor, then a signal charge is generated in a P type semiconductor substrate. The signal charge thus produced is collected in the N.sup.+ layer. Only during the period in which the lag control electrode is impressed with a prescribed level of voltage, then part of the signal charge is trapped in interface states between that portion of a SiO.sub.2 layer which lies below the lag control electrode and the N.sup.+ layer. Only during the period in which the gate electrode is impressed with a prescribed level of voltage, the signal charge collected in the N.sup.+ layer is delivered to the channel layer of a CCD shift register.

REFERENCES:
"Charge Transfer Device", by Carlo H. Sequin and Michael F. Tompsett, Academic Press, Inc., NY, 1975, pp. 168 and 169.

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