Method and apparatus for adjusting phase-lock-loop parameters

Details Method and apparatus for adjusting phase-lock-loop parameters Method and apparatus for adjusting phase-lock-loop parameters

1996-06-07

1998-06-16

Callahan, Timothy P.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 10, 327156, 327158, 375376, H03L 7197

Patent

active

057677468

ABSTRACT:
A method and apparatus for adjusting the parameters of a PLL in a communication system. The method measures the rate of transmission of clock reference information by measuring the time of arrival of successive clock references or the difference of the clock reference values. The method applies the measured transmission rate to a plurality of predefined transmission rate ranges to acquire the proper gain factor values. These gain factor values are used to control the responsiveness of the PLL to new clock reference information.

REFERENCES:
patent: 5315270 (1994-05-01), Leonowich
patent: 5467342 (1995-11-01), Logston et al.

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