Method of manufacturing insulated gate thin film field effect tr

Details Method of manufacturing insulated gate thin film field effect tr Method of manufacturing insulated gate thin film field effect tr

1984-06-15

1985-03-05

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29584, 29591, 204 15, 204 42, 204 56R, 204164, H01L 21203

Patent

active

045022046

ABSTRACT:
A method of manufacturing insulated gate thin film field effect transistors is disclosed in which first and second closely adjacent anodic oxidation electrodes are formed on an electrically insulating substrate, and a semiconducting layer is formed on the insulating substrate and the first and second anodic oxidation electrodes. An anodic oxidation of the semiconducting layer is performed, utilizing the first and second anodic oxidation electrodes, to form an oxide layer on the semiconducting layer. The oxide layer is then patterned to form a gate insulator and the semiconducting layer is patterned to expose a portion of each of the first and second anodic oxidation electrodes. The exposed portions of the first and second anodic oxidation electrodes are patterned to form source and drain electrodes, respectively.

REFERENCES:
patent: 3258663 (1966-06-01), Weimer
patent: 3391035 (1968-07-01), Mackintosh
patent: 3520051 (1970-07-01), Topfer et al.
patent: 3568305 (1971-03-01), Janning
patent: 3616527 (1971-11-01), Janning
patent: 3699011 (1972-10-01), Nishimura
patent: 3798752 (1974-03-01), Fujimoto
patent: 4332075 (1982-01-01), Ota et al.
patent: 4372032 (1983-02-01), Collins et al.

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