Text comparator with counter shift register

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3649427, 3649475, 364963, 364419, G06F 1540, G06F 702

Patent

active

049411241

ABSTRACT:
A text comparator which includes a decoded data memory (13) which contains a plurality of shift registers (SR2d-SR7F), one shift register for each of the plurality of different symbols forming the data base stored within the mass storage device (11). The decoded signal is applied to the input lead of the shift register associated with that character, and a clock signal applied to each shift register of the decoded data memory. The decoded data memory will provide signals on the output leads of each shift register indicative of the most recently received character, as well as each of the preceding K characters received from the mass storage device and decoded. The output leads of the shift registers are connected to a variety of logic gates in order to provide an output signal indicating when the desired textual phrase has been located on the disk. In addition, word counters, paragraph counters, and other devices are employed as desired to provide special text comparison functions. A second embodiment of a text comparator constructed in accordance with this invention receives data stored in a mass storage device. This embodiment includes word logic, delimiter logic, set logic, set combination logic, proximity logic and programming logic.

REFERENCES:
patent: 3316540 (1967-04-01), Nissim
patent: 3358270 (1967-12-01), Crew et al.
patent: 4014011 (1977-03-01), Ashkin
patent: 4016405 (1977-04-01), McCune et al.
patent: 4092665 (1978-05-01), Saran
patent: 4201942 (1980-05-01), Downer
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patent: 4450520 (1984-05-01), Hollaar et al.
patent: 4451901 (1984-05-01), Wolfe et al.
patent: 4456933 (1984-06-01), Schneider et al.
patent: 4550436 (1985-10-01), Freeman et al.
Taub et al., "Digital Integrated Electronics", McGraw-Hill Inc., 1977, pp. 322-327.
Floyd, Digital Logic Fundamentals, Bell and Howell Company, Columbus, OH, 1977.

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