Method of fabricating a BiCMOS device having closely spaced cont

Details Method of fabricating a BiCMOS device having closely spaced cont Method of fabricating a BiCMOS device having closely spaced cont

1991-11-06

1993-08-10

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 59, 437231, 437 31, 148DIG9, H01L 21265

Patent

active

052348474

ABSTRACT:
A BiCMOS method and device. The BiCMOS device achieves improved performance through the use of silicide contacts overlying doped polysilicon which extend fully up to and contact sidewall oxide formations. Silicide contacts in emitter regions and gate regions are separated from silicide contacts of base contacts and source and drain contacts only by the thickness of the sidewall oxides, which are adjacent the emitter region and gate regions.

REFERENCES:
patent: 3955269 (1976-05-01), Magdo et al.
patent: 4484388 (1984-11-01), Iwasaki
patent: 4507847 (1985-04-01), Sullivan
patent: 4536945 (1985-08-01), Gray et al.
patent: 4609568 (1986-09-01), Koh et al.
patent: 4707456 (1987-11-01), Thomas et al.
patent: 4735916 (1988-04-01), Homma et al.
patent: 4764480 (1988-08-01), Vora
patent: 4778774 (1988-10-01), Blossfeld
patent: 4784971 (1988-11-01), Chiu et al.
patent: 4795722 (1989-01-01), Welch et al.
patent: 4829025 (1989-05-01), Iranmanesh
patent: 4897364 (1990-01-01), Nguyen
patent: 4902640 (1990-02-01), Sachitano et al.
patent: 4925807 (1990-05-01), Yoshikawa
patent: 4948745 (1990-08-01), Pfiester et al.
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4966865 (1990-10-01), Welch et al.
patent: 4992388 (1991-02-01), Pfiester
patent: 5001081 (1991-03-01), Tuntasood et al.
patent: 5015594 (1991-05-01), Chu et al.
Silicon Processing for the VLSI Era; Wolf et al. vol. 1; 1986; pp. 529-531.
Inside Technology, Is BiCMOS the next technology driver; Electronics, Feb. 88; pp. 55-67.
Chiu, Tzu-Yin, "A High Speed Super Self-Aligned Bipolar-CMOS Technology", Int'l Electron Devices Meeting, Dec. 1987.
Brassington, et al., "An Advanced Single-Level Polysilicon Submicrometer BiCMOS Technology," IEEE Trans. Elect. Devices, pp. 712-719 1989.
Momose, et al., "1.mu.m n-well CMOS/Bipolar Technology," IEDM Transactions (Feb. 1985) p. 217.
Kapoor, et al., "A High Speed High Density Single-Poly ECL Technology for Linear/Digital Applications" 1985 Custom Integrated Circuits Conference, pp. 184-187.
Gomi, et al., "A Sub-30psec Si Bipolar LSI Technology" IEDM Technical Digest (1988) pp. 744-747.
Takemura, et al., "BSA Technology for Sub-100mn Deep Base Bipolar Transistors" IEDM Technical Digest (1987), pp. 375-377.
Chiu, et al., "A Bird's Beak Free Local Oxidation Technology Feasible to VSLI Circuits Fabrication" IEEE Transactions on Electron Devices, vol. ED-29, No. 4, pp. 536-540, Apr., 1982.

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