Square root operation device

Details Square root operation device Square root operation device

1992-06-03

1994-04-26

Malzahn, David H.

Boots, shoes, and leggings

G06F 7552

Patent

active

053073029

ABSTRACT:
An approximation of square root's reciprocal is indexed by a table information storing means taking high-order positions of a 2-bit normalized operand output from a normalizing circuit as an address. A 0th partial residue as being a normalized operand is multiplied by an output of a residue holding circuit by a multiplying circuit to find a partial square root value. The partial square root values obtained at each iteration and having no bit-overlap are held in a plurality of partial square root value holding circuits as a merged square root value. A residue at the next step in an iterative computation is obtained by subtracting a product of the merged square root value times the partial square root value from the residue by an inverting circuit, a multiplicand generator and a (R+S.times.T+T) operation unit.

REFERENCES:
patent: 4878190 (1989-10-01), Darley et al.
patent: 4949296 (1990-08-01), Malinowski
patent: 4999801 (1991-03-01), Katsuno
patent: 5157624 (1992-10-01), Hesson
patent: 5159566 (1992-10-01), Briggs et al.
P. Montuschi et al., On The Efficient Implementation Of Higher Radix Square Root Algorithms, Dipartimento di Automatica e Informatica, pp. 154-161.

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