Three dimensional structure memory

Details Three dimensional structure memory Three dimensional structure memory

1997-04-04

1999-06-22

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

438107, 438455, H01L 2144, H01L 2148, H01L 2150

Patent

active

059151676

ABSTRACT:
A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 .mu.m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.

REFERENCES:
patent: 4070230 (1978-01-01), Stein
patent: 4131985 (1979-01-01), Greenwood et al.
patent: 4416054 (1983-11-01), Thomas et al.
patent: 4539068 (1985-09-01), Takagi et al.
patent: 4585991 (1986-04-01), Reid et al.
patent: 4612083 (1986-09-01), Yasumoto et al.
patent: 4618397 (1986-10-01), Shimizu et al.
patent: 4702936 (1987-10-01), Maeda et al.
patent: 4721938 (1988-01-01), Stevenson
patent: 4761681 (1988-08-01), Reid
patent: 4784721 (1988-11-01), Holmen et al.
patent: 5070026 (1991-12-01), Greenwald et al.
patent: 5071510 (1991-12-01), Findler et al.
patent: 5130894 (1992-07-01), Miller
patent: 5236118 (1993-08-01), Bower et al.
patent: 5262351 (1993-11-01), Bureau et al.
patent: 5273940 (1993-12-01), Sanders
patent: 5284796 (1994-02-01), Nakanishi et al.
patent: 5385632 (1995-01-01), Goossen
patent: 5426072 (1995-06-01), Finnila
patent: 5432729 (1995-07-01), Carson et al.
patent: 5457879 (1995-10-01), Gurtler et al.
patent: 5502667 (1996-03-01), Bertin et al.
patent: 5534465 (1996-07-01), Frye et al.
patent: 5581498 (1996-12-01), Ludwig et al.
patent: 5637536 (1997-06-01), Val
"IC Tower Patent: Simple Technology Receives Patent on the IC Tower, a Stacked Memory Technology", http://www.simpletech.com/whatsnew/memory/m@60824.htm (1998).
Runyan, W. R., "Deposition of Inorganic Thin Films", Semiconductor Integrated Circuit Processing Technology, p. 142 (1990).
Sze, S. M., "Surface Micromachining", Semiconductor Sensors, pp. 58-63 (1994).
Vossen, John L., "Plasma-Enhanced Chemical Vapor Deposition", Thin Film Processes II, pp. 536-541 (1991).
Wolf, Stanley, "Basics of Thin Films", Silicon Processing for the VLSI Era, pp. 115, 192-193 and 199 (1986).

Affiliated with

Also associated with

Rating

Three dimensional structure memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Three dimensional structure memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Three dimensional structure memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1715170