Patent
1997-04-29
1999-06-22
Sheikh, Ayaz R.
39575001, 39575003, 39575008, G06F 132
Patent
active
059151218
ABSTRACT:
An integrated circuit configuration has a multiplicity of function units which are connected to one another through a bus. An intermediate memory unit that is activated by a control signal is connected between the bus lines and the respective function unit. The function unit is then connected to the respective bus lines only when it is triggered.
REFERENCES:
patent: 5307324 (1994-04-01), Nishimoto
patent: 5369611 (1994-11-01), Miura
Etienne Ario
Greenberg Laurence A.
Lerner Herbert L.
Sheikh Ayaz R.
Siemens Aktiengesellschaft
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