Parallel computer utilizing less memory by having first and seco

Details Parallel computer utilizing less memory by having first and seco Parallel computer utilizing less memory by having first and seco

1995-03-24

1998-11-24

Swann, Todd R.

39580016, G06F 1516

Patent

active

058420355

ABSTRACT:
A parallel computer comprising a plurality of processor elements and a network interconnecting the same, wherein each of the plurality of processor elements includes: a memory unit including a first area and a second area, the first area storing a program and a data portion allocated to the processor element, the second area having a smaller capacity than the first area and storing working data temporarily; a first data transferring unit for performing a first data transfer, whereby data necessary for an operation are transferred to the second area from the first areas of the other processor elements via the network to form a new data portion therein; a processor for performing a first operation, whereby the data portion in the first area is processed as per program and an operation result is restored into the first area, and for performing a second operation, whereby the new data portion in the second area is processed as per program and an operation result is restored into the second area; and a second data transferring unit for performing a second data transfer, whereby the operation results restored in the second areas in the other processor elements are transferred to the first area of the processor element via the network.

REFERENCES:
patent: 4740894 (1988-04-01), Lyon
patent: 4821187 (1989-04-01), Ueda et al.
patent: 5043873 (1991-08-01), Muramatsu et al.
patent: 5079694 (1992-01-01), Nakagawa et al.
patent: 5095527 (1992-03-01), Uramoto et al.
patent: 5138704 (1992-08-01), Takahashi et al.
patent: 5297255 (1994-03-01), Hamanaka et al.
patent: 5371865 (1994-12-01), Aikawa et al.
patent: 5388220 (1995-02-01), Okabayashi
patent: 5513364 (1996-04-01), Nishikawa
"High Performance Fortran Language Specification", High Performance Fortran Forum Jan. 25, 1993, pp. 1-111 & 7-18.
"Parallel Programming Language ADETRAN", by T. Nogi, Mem. Fac. Eng. Kyoto Univ. vol. 51, No. 4, (1989), pp. 235-290.
"VLSI Implementation of a Parallel Computer Network", by K. Kaneko et al., IEICE Transactions, vol. E 74, No. 11, Nov. 1991, pp. 3810-3818.

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