Timer tick auto-chaining technique within a symmetrical multipro

Details Timer tick auto-chaining technique within a symmetrical multipro Timer tick auto-chaining technique within a symmetrical multipro

1994-05-31

1997-03-18

Sheikh, Ayaz R.

395868, G06F 946

Patent

active

056131267

ABSTRACT:
A symmetrical multiprocessing system is provided that includes centralized interrupt control unit. The interrupt control unit is coupled to a plurality of processing units and to a plurality of interrupt sources. The interrupt control unit advantageously allows for the expansion of each interrupt pin by setting the interrupt control unit in a cascade mode. Furthermore, the central control unit is responsive to specialized interrupt cycles which allows I/O devices and/or bus bridge devices to initiate of an interrupt without requiring a dedicated interrupt line. The central interrupt control unit further allows each interrupt to be prioritized independently of its associated vector ID, and prevents the occurrence of spurious interrupts by providing a programmable latency timer which causes the central interrupt control unit to delay its response to End Of Interrupt (EOI) instructions. An auto-chaining technique is further implemented by the central interrupt control unit to sequentially provide broadcast interrupts to various processing units based on their current task priority values. Finally, the central interrupt control unit further handles system management interrupts (SMIs) from sources such as power management units and ensures proper system operation even if the requested system management function affects operations being carried by other processing units.

REFERENCES:
patent: 3421150 (1969-01-01), Quosig et al.
patent: 4130865 (1978-12-01), Heart et al.
patent: 4271468 (1981-06-01), Christensen et al.
patent: 4394727 (1983-07-01), Hoffman et al.
patent: 4495569 (1985-01-01), Kagawa
patent: 4985831 (1991-01-01), Duions et al.
patent: 5099414 (1992-03-01), Cole et al.
patent: 5125093 (1992-06-01), McFarland
patent: 5193189 (1993-03-01), Flood et al.
patent: 5218703 (1993-06-01), Fleck et al.
patent: 5265215 (1993-11-01), Fukuda et al.
patent: 5283904 (1994-02-01), Carson et al.
patent: 5297290 (1994-03-01), Masui et al.
patent: 5371849 (1994-12-01), Peaslee et al.
patent: 5379428 (1995-01-01), Belo
patent: 5410710 (1995-04-01), Sarangdhar et al.
patent: 5452452 (1995-09-01), Gaetner et al.
Intel, "MultiProcessor Specification", Version 1.1 (Apr. 1994).

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